In the following we give a pseudo-formal semantics for UPPAAL. The semantics defines a timed transition system (*S, s _{0},* →) describing the behaviour of a network of extended timed automata. The set of states

Given a valuation *v* and an expression *e*, we say that *v* satisfies *e* if *e* evaluates to non-zero for the given valuation *v*.

If during a successor computation any expression evaluation is invalid (consult the section on expressions for further details about invalid evaluations), the verification is aborted.

Delay transitions model the passing of time without changing the current location. We have a delay transition (*L, v*) −^{d}→ (*L, v’*), where *d* is a non-negative real, if and only if:

*v’ = v+d*, where*v+d*is obtained by incrementing all clocks with*d*.- for all
*0 ≤ d’ ≤ d: v+d’ ⊨ Inv*(*L*) *L*contains neither committed nor urgent locations- for all locations
*ℓ*in*L*and for all locations*ℓ’*(not necessarily in*L*), if there is an edge from*ℓ*to*ℓ’*then either:- this edge does not synchronise over an urgent channel, or
- this edge does synchronise over an urgent channel, but for all
*0 ≤ d’ ≤ d*we have that*v+d’*does not satisfy the guard of the edge.

For action transtions, the synchronisation label of edges is important. Since UPPAAL supports arrays of channels, we have that the label contains an expression evaluating to a channel. The concrete channel depends on the current valuation. To avoid cluttering the semantics we make the simplifying assumption that each synchronisation label refers to a channel directly.

Priorities increase the determinism of a system by letting a high priority action transition block a lower priority action transition. Note that delay transitions can never be blocked, and no action transition can be blocked by a delay transition.

For action transitions, there are three cases: Internal transitions, binary synchronisations and broadcast synchronisations. Each will be described in the following.

We have a transition (*L, v*) −^{*}→ (*L’, v’*) if there is an edge *e=*(*ℓ,ℓ’*) such that:

- there is no synchronisation label on
*e* *v*satisfies the guard of*e**L’ = L*[*ℓ’/ℓ*]*v’*is obtained from*v*by executing the update label given on*e**v’*satisfies*Inv*(*L’*)- Either
*ℓ*is committed or no other location in*L*is committed. - There is no action transition from (
*L, v*) with a strictly higher priority.

We have a transition (*L, v*) −^{*}→ (*L’, v’*) if there are two edges *e _{1}=*(

*e*has a synchronisation label_{1}*c!*and*e*has a synchronisation label_{2}*c?*, where*c*is a binary channel.*v*satisfies the guards of*e*and_{1}*e*._{2}*L’ = L*[*ℓ*]_{1}’/ℓ_{1}, ℓ_{2}’/ℓ_{2}*v’*is obtained from*v*by first executing the update label given on*e*and then the update label given on_{1}*e*._{2}*v’*satisfies*Inv*(*L’*)- Either
*ℓ*or_{1}*ℓ*or both locations are committed, or_{2}- no other location in
*L*is committed.

- There is no action transition from (
*L, v*) with a strictly higher priority.

Assume an order *p _{1}, p_{2}, … p_{n}* of processes given by the order of the processes in the system declaration statement. We have a transition (

- Edges
*e, e*are in different processes._{1}, e_{2}, …, e_{m} *e*are ordered according to the process ordering_{1}, e_{2}, …, e_{m}*p*._{1}, p_{2},… p_{n}*e*has a synchronisation label*c!*and*e*have synchronisation labels_{1}, e_{2}, …, e_{m}*c?*, where*c*is a broadcast channel.*v*satisfies the guards of*e, e*._{1}, e_{2}, … e_{m}- For all locations
*ℓ*in*L*not a source of one of the edges*e, e*, all edges from_{1}, e_{2}, … e_{m}*ℓ*either do not have a synchronisation label*c?*or*v*does not satisfy the guard on the edge. *L’ = L*[*ℓ’/ℓ, ℓ*]_{1}’/ℓ_{1}, ℓ_{2}’/ℓ_{2}, … ℓ_{m}’/ℓ_{m}*v’*is obtained from*v*by first executing the update label given on*e*and then the update labels given on*e*for increasing order of_{i}*i*.*v’*satisfies*Inv*(*L’*)- Either
- one or more of the locations
*ℓ, ℓ*are committed, or_{1}, ℓ_{2}, … ℓ_{m} - no other location in
*L*is committed.

- one or more of the locations
- There is no action transition from (
*L, v*) with a strictly higher priority.

In statistical model checking the concrete delay and transition are determined as follows:

- Each process chooses a delay based on its current location:
- If the current location invariant has a time bound, then the concrete delay is taken according uniform distribution up to that bound.
- Otherwise (the time invariant is absent) the delay is chosen by exponential distribution using the rate λ specified on the current location. The probability density function of delay d∈[0;∞) is F(d)=λe
^{−λd}, where e=2.718281828… and the concrete delay is generated by^{−ln(u)}/_{λ}where u is a uniform random number from (0;1] interval.

- The process with the shortest delay is chosen. If there are several such processes then a random one of these is chosen (according to uniform distribution).
- The shortest delay is executed and continuous variables are updated.
- The chosen process attempts to take a transition:
- Compute all enabled internal and sending edge-transitions.
- Pick the concrete edge according to uniform distribution.
- If the edge has probabilistic branches, then the probability of taking a branch
*i*is determined by the ratio, where^{wi}/_{W}*w*is the weight of the branch_{i}*i*and*W*is the sum of all branch weights:*W=Σ*._{j}w_{j}

Statistical model checking has the following assumptions about the model:

- Input enableness (non-blocking inputs):
- Sending cannot be blocked, i.e. the channel is either broadcast or there is always one process with an enabled receiving edge-transition.
- Input determinism:
- There is exactly one enabled receiving edge-transition at a time. For binary synchronizations there is at most one receiving process at a time.

For more details about probabilistic semantics of priced timed automata please see:

Statistical Model Checking for Networks of Priced Timed Automata, Alexandre David, Kim G. Larsen, Axel Legay, Marius Mikučionis, Danny Bøgsted Poulsen, Jonas van Vliet and Zheng Wang. In Proceedings of the 9^{th}International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS), Aalborg, Denmark, September 2011.